1. Field of the Invention
The present invention relates to an inductance device, formed on a semiconductor substrate, which constitutes an integrated circuit, and in particular to an inductance device for which there is a small loss and a small inductance reduction.
2. Related Arts
Recently there has been a reduction in the sizes of the portable communication devices, such as portable telephones. And this has been accompanied by an increased demand for the high-frequency circuits used in such small portable communication devices to be constituted using integrated circuits for which silicon semiconductors are employed. Such high-frequency circuits require not only transistors, resistors and capacitors, but also inductance devices, such as coils and transformers. Therefore, the inductance devices must be formed on a silicon substrate, with transistors and resistors being employed by integrated circuits.
The inductance device is generally provided by depositing an aluminum, belt-like spiral or coil shaped conductive film on an insulating film formed on the surface of a semiconductor substrate. However, with this structure, it is well known that since the semiconductor substrate is located very near the inductance device, an eddy current, which prevents a change in the magnetic flux generated when a current flows across the inductance device, is generated in the semiconductor substrate so that the characteristic of the inductance device has a loss.
Specifically, assuming that a belt-like conductive layer, which is deposited in the shape of a coil, serves as a primary coil for a transformer, the semiconductor substrate including impurities has a low resistance and thus serves as a short-circuited secondary coil in a high-frequency area. The loss caused due to the presence of the secondary coil is noticeable, particularly in a high-frequency area, and several methods for preventing the occurrence of an eddy current in the semiconductor substrate have been proposed. In Japanese Unexamined Patent Publication No. Hei 7-183468, for example, a method is described wherein a plurality of PN junctions are formed at the surface of a silicon semiconductor substrate, and the effect of an eddy current is limited by using depletion layers generated at the PN junctions. In other words, the passage of an eddy current across the surface of the semiconductor substrate is interdicted by a plurality of depletion layers, so that the eddy current can be reduced. Furthermore, in Japanese Unexamined Patent Publication No. Hei 7-235640 a method is proposed wherein a plurality of PN junctions are formed at the surface of a silicon semiconductor substrate and a controlled reverse bias voltage is applied to the PN junctions, and capacitors provided by depletion layers formed at the junctions are employed to form a composite LC circuit device. In this prior art, the occurrence of an eddy current is also inhibited by using the depletion layers which are formed at the surface of the substrate.
FIG. 6 is a diagram illustrating the structure of such a conventional inductance device. N-type impurity areas 14 are formed at the surface of a P-type semiconductor substrate 10, and a plurality of PN junctions are formed at the surface of the semiconductor substrate 10. An insulating film 12 is deposited on the surface of the semiconductor substrate 10, and a belt-like conductive film 16 having a spiral shape is formed thereon. One end 16A of the belt-like conductive film is connected to a line (not shown) and the other end 16B is connected to a lower line 18 formed in the insulating film 12. When a current flows from one end of the belt-like conductive film 16 to the other end in the direction indicated by an arrow 22, magnetic flux is induced in the spiral wiring.
Since depletion layers are formed at the PN junctions in the structure shown in FIG. 6, a greater number of depletion layers are formed at the obverse surface of the substrate 10, the resistance for the eddy current, generated in the semiconductor substrate 10 with respect to the magnetic flux, which is generated by the inductance device constituted by the belt-like conductive film 16, is increased, and the eddy current can be inhibited so that a loss due to the eddy current and a reduction of the inductance can be prevented.
In the above prior art, however, a plurality of depletion layers are merely formed at the surface of the semiconductor substrate 10, and an eddy current is still induced at the surface. That is, since an undepleted semiconductor area is present between the primary coil of the belt-like conductive film 16 and the secondary coil, which is the path taken by the eddy current in the substrate 10, the mutual inductance generated between the coils is not low. Although the entire surface of the semiconductor substrate could become depleted, the minute processing is automatically limited to form impurity containing areas 14 having a conductive type opposite to the substrate 10, at the surface of the substrate 10 on which an integrated circuit is mounted. Therefore, it is difficult to form a plurality of adjacent PN junctions which can adequately deplete the entire surface of the substrate 10. Furthermore, since the semiconductor substrate 10 on which the integrated circuit is mounted has itself a high impurity density, the width of the depletion layer that extends naturally between the PN junctions formed at the surface is not very great. As a result, at most a thin depletion layer is formed along the PN junctions. Therefore, the entire surface of the substrate 10 is not depleted, and as is described above, the prior art can provide an effect whereby only the resistance is reduced in an area where an eddy current occurs.
In addition, as is shown in an equivalent circuit in FIG. 7, the density of the impurities in the substrate 10 is comparatively high, and a resistance Rs inside the substrate 10 is comparatively low. A resistance rn in the N-type impurity areas 14 formed in the surface of the substrate 10 is also comparatively low. Thus, a capacitor provided by the PN junction and the insulating film 12 are electrically connected to an inductance device L, and affects it characteristic.
As is described above, since the inductance device, which is the belt-like conductive film 16, serves as the primary coil, and the path of the eddy current in the substrate 10 serves as a secondary coil, in order to reduce the loss incurred by the inductance device and to improve its characteristic, the strength of the insulation between the coils must be increased and the effective mutual inductance between the coils must be reduced.
Further, as is shown in FIG. 6, when a current 22 flows across the belt-like conductive film 16, an eddy current 20 is generated not only in the substrate 10 but also in the belt-like conductive film 16. Since many magnetic fluxes are generated, particularly at the belt-like conductive film 16 which is wound at an inward portion, a large eddy current 20 occurs. Since such eddy current in the conductive film 16 is also a factor in a loss, its occurrence should be avoided. To avoid the occurrence of an eddy current, the width of the wire of the belt-like conductive film 16 could be narrowed; however, this is not feasible because in that case the resistance of the conductive film 16 would be increased, and the inductance element thereof also would be increased.